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 MJ11021(PNP) MJ11022 (NPN) Complementary Darlington Silicon Power Transistors
Complementary Darlington Silicon Power Transistors are designed for use as general purpose amplifiers, low frequency switching and motor control applications.
Features http://onsemi.com
* High dc Current Gain @ 10 Adc - hFE = 400 Min (All Types) * Collector-Emitter Sustaining Voltage * Low Collector-Emitter Saturation
VCE(sat) VCEO(sus) = 250 Vdc (Min) - MJ11022, 21 = 1.0 V (Typ) @ IC = 5.0 A = 1.8 V (Typ) @ IC = 10 A 100% SOA Tested @ VCE = 44 V IC = 4.0 A t = 250 ms Pb-Free Packages are Available*
15 AMPERE COMPLEMENTARY DARLINGTON POWER TRANSISTORS 250 VOLTS, 175 WATTS
* *
TO-204 (TO-3) CASE 1-07 STYLE 1
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Collector-Emitter Voltage Collector-Base Voltage Emitter-Base Voltage Collector Current - Continuous - Peak (Note 1) Base Current Total Power Dissipation @ TC = 25C Derate Above 25C Operating and Storage Junction Temperature Range Symbol VCEO VCBO VEBO IC IB PD TJ, Tstg Value 250 250 50 15 30 0.5 175 1.16 - 65 to +175 - 65 to +200 Unit Vdc Vdc Vdc Adc Adc W W/C C MJ1102x = Device Code x = 1 or 2 G = Pb-Free Package A = Location Code YY = Year WW = Work Week MEX = Country of Orgin MJ1102xG AYYWW MEX
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance, Junction-to-Case Symbol RqJC Max 0.86 Unit C/W
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%.
ORDERING INFORMATION
Device MJ11021 MJ11021G MJ11022 Package TO-3 TO-3 (Pb-Free) TO-3 TO-3 (Pb-Free) Shipping 100 Units/Tray 100 Units/Tray 100 Units/Tray 100 Units/Tray
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
MJ11022G
1
December, 2005 - Rev. 2
Publication Order Number: MJ11021/D
MJ11021(PNP)
MJ11022 (NPN)
RB and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS D1 MUST BE FAST RECOVERY TYPE, e.g.: 1N5825 USED ABOVE IB 100 mA MSD6100 USED BELOW IB 100 mA
TUT V2 APPROX +12 V 0 V1 APPROX -8.0 V tr, tf 10 ns DUTY CYCLE = 1.0% +4.0 V 25 ms for td and tr, D1 is disconnected and V2 = 0 RB 51 D1
PD, POWER DISSIPATION (WATTS)
200
VCC 100 V RC SCOPE
150
100
10 K
8.0
50
0
0
25
50
75 100 125 150 TC, CASE TEMPERATURE (C)
175
200
For NPN test circuit reverse diode and voltage polarities.
Figure 1. Power Derating
Figure 2. Switching Times Test Circuit
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Collector-Emitter Sustaining Voltage (Note 1) (IC = 0.1 Adc, IB = 0) Collector Cutoff Current (VCE = 125, IB = 0) Collector Cutoff Current (VCE = Rated VCB, VBE(off) = 1.5 Vdc) (VCE = Rated VCB, VBE(off) = 1.5 Vdc, TJ = 150_C) Emitter Cutoff Current (VBE = 5.0 Vdc, IC = 0) ON CHARACTERISTICS (Note 1) DC Current Gain (IC = 10 Adc, VCE = 5.0 Vdc) (IC = 15 Adc, VCE = 5.0 Vdc) Collector-Emitter Saturation Voltage (IC = 10 Adc, IB = 100 mA) (IC = 15 Adc, IB = 150 mA) Base-Emitter On Voltage IC = 10 A, VCE = 5.0 Vdc) Base-Emitter Saturation Voltage (IC = 15 Adc, IB = 150 mA) DYNAMIC CHARACTERISTICS Current-Gain Bandwidth Product (IC = 10 Adc, VCE = 3.0 Vdc, f = 1.0 MHz) Output Capacitance (VCB = 10 Vdc, IE = 0, f = 0.1 MHz) MJ11022 MJ11021 Small-Signal Current Gain (IC = 10 Adc, VCE = 3.0 Vdc, f = 1.0 kHz) SWITCHING CHARACTERISTICS Characteristic Delay Time Rise Time Storage Time Fall Time 1. Pulsed Test: Pulse Width = 300 ms, Duty Cycle v 2%. (VCC = 100 V, IC = 10 A, IB = 100 mA VBE(off) = 50 V) (See Figure 2) Symbol td tr ts tf Typical NPN PNP 150 1.2 4.4 10.0 75 0.5 2.7 2.5 Unit ns ms ms ms hfe [hfe] Cob - - 75 400 600 - - 3.0 - Mhz pF hFE 400 100 VCE(sat) - - VBE(on) VBE(sat) - - 2.0 3.4 2.8 3.8 Vdc Vdc 15,000 - Vdc - VCEO(sus) MJ11021, MJ11022 ICEO MJ11021, MJ11022 ICEV - - IEBO - 0.5 5.0 2.0 mAdc - 1.0 mAdc 250 - mAdc Vdc Symbol Min Max Unit
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2
MJ11021(PNP)
r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1.0 0.7 0.5 0.3 0.2 0.1 0.1 0.07 0.05 0.03 0.02 0.01 0.01 SINGLE PULSE 0.05 0.02 0.01
MJ11022 (NPN)
D = 0.5 0.2 P(pk)
RqJC(t) = r(t) RqJC RqJC(t) = 0.86C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RqJC(t)
t1 t2 DUTY CYCLE, D = t1/t2 50 100 200 300 500 1000
0.02
0.03 0.05
1.0
0.2
0.3 0.5
1.0
2.0 3.0 5.0 t, TIME (ms)
10
20
30
Figure 3. Thermal Response
30 IC, COLLECTOR CURRENT (AMPS) 5.0 ms 30 20 10 5.0 3.0 2.0 1.0 0.5 0.3 0.2 0 3.0 dc TJ = 175C SECOND BREAKDOWN LIMIT BONDING WIRE LIMIT THERMAL LIMITATION @ TC = 25C SINGLE PULSE 1.0 ms 0.1 ms IC, COLLECTOR CURRENT (AMPS) 0.5 ms L = 200 mH IC/IB1 50 TC = 25C VBE(off) 0 - 5.0 V RBE = 47 W DUTY CYLE = 10%
20
10
5.0 7.0
10
20
30 50
70
100 150 200
0 0 20 60 100 140 180 220 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) 260
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 4. Maximum Rated Forward Bias Safe Operating Area (FBSOA) FORWARD BIAS
Figure 5. Maximum RBSOA, Reverse Bias Safe Operating Area REVERSE BIAS
There are two limitations on the power handling ability of a transistor average junction temperature and second breakdown. Safe operating area curves indicate I C - V CE limits of the transistor that must be observed for reliable operation, i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 4 is based on T J(pk) = 175_C, TC is variable dependIng on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided T J(pk) v 175_C. T J(pk) may be calculated from the data in Figure 3. At high case temperatures thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown.
For inductive loads, high voltage and high current must be sustained simultaneously during turn-off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be hold to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage-current conditions during reverse biased turn-off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 5 gives ROSOA characteristics.
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3
MJ11021(PNP)
PNP
10,000 7000 5000 hFE , DC CURRENT GAIN 3000 2000 TJ = 25C 1000 700 500 300 200 100 0.2 VCE = 5.0 Vdc hFE , DC CURRENT GAIN TJ = 150C
MJ11022 (NPN)
NPN
30,000 20,000 10,000 7000 5000 3000 2000 1000 700 500 TJ = 25C TJ = 150C VCE = 5.0 Vdc
TJ = - 55C
TJ = - 55C
0.3
0.5 0.7 1.0 2.0 3.0 5.0 7.0 IC, COLLECTOR CURRENT (A)
10
15 20
300 0.2 0.3
0.5 0.7 1.0 2.0 3.0 5.0 7.0 IC, COLLECTOR CURRENT (A)
10
15 20
Figure 6. DC Current Gain PNP
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS) 4.0 IC = 15 A 3.5 IC = 10 A 3.0 IC = 5.0 A 2.5 2.0 1.5 1.0 0.5 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 200 300 500 IB, BASE CURRENT (mA) TJ = 25C VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS) 4.0 IC = 15 A 3.5 IC = 10 A 3.0 IC = 5.0 A 2.5 2.0 1.5 1.0 0.5 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 200 300 500 IB, BASE CURRENT (mA) TJ = 25C
NPN
Figure 7. Collector Saturation Region
PNP
4.0 3.5 VOLTAGE (VOLTS) 3.0 2.5 2.0 1.5 1.0 0.5 0.1 VBE(sat) @ IC/IB = 100 VBE @ VCE = 5.0 V VCE(sat) @ IC/IB = 100 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 TJ = 25C VOLTAGE (VOLTS) 4.0 3.5
NPN
TJ = 25C 3.0 2.5 2.0 1.5 1.0 0.5 0.1 VBE(sat) @ IC/IB = 100 VBE @ VCE = 5.0 V 0.2 0.3 0.5 0.7 1.0
VCE(sat) @ IC/IB = 100 2.0 3.0 5.0 7.0 10 20 30 50
COLLECTOR CURRENT (AMPS)
COLLECTOR CURRENT (AMPS)
Figure 8. "On" Voltages
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4
MJ11021(PNP)
MJ11022 (NPN)
PACKAGE DIMENSIONS
TO-204 (TO-3) CASE 1-07 ISSUE Z
A N C -T- E D
2 PL SEATING PLANE
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. ALL RULES AND NOTES ASSOCIATED WITH REFERENCED TO-204AA OUTLINE SHALL APPLY. DIM A B C D E G H K L N Q U V INCHES MIN MAX 1.550 REF --- 1.050 0.250 0.335 0.038 0.043 0.055 0.070 0.430 BSC 0.215 BSC 0.440 0.480 0.665 BSC --- 0.830 0.151 0.165 1.187 BSC 0.131 0.188 MILLIMETERS MIN MAX 39.37 REF --- 26.67 6.35 8.51 0.97 1.09 1.40 1.77 10.92 BSC 5.46 BSC 11.18 12.19 16.89 BSC --- 21.08 3.84 4.19 30.15 BSC 3.33 4.77
K
M
0.13 (0.005) U V
2
TQ
M
Y
M
L G
1
-Y-
H
B
-Q- 0.13 (0.005)
M
TY
M
STYLE 1: PIN 1. BASE 2. EMITTER CASE: COLLECTOR
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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5
MJ11021/D


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